1. Field of the Invention
The present invention relates generally to a process for making a display panel of the type used in liquid crystal displays, and more particularly, to a process for making a gate electrode/wiring structure thereof.
2. Description of the Prior Art
FIG. 1 illustrates the structure of a conventional liquid crystal display panel. The reference numerals appearing in FIG. 1 designate the following elements: a substrate 1; a Cr (chromium) layer/gate electrode 2; an Al (aluminum) layer 3; a gate insulating layer 4; an amorphous silicon layer (a--Si) 5; a source electrode 6; a transparent pixel electrode 7; a gate wiring layer 8; and, a signal wiring layer 9 which serves as a drain electrode.
With continuing reference to FIG. the gate electrode 2 and the gate insulating layer 4 are formed of Cr and SiN (silicon nitride), respectively. The gate wiring layer 8 is a two-layered construction in which the Cr layer is formed on the substrate and the Al layer (which has a low specific resistance) is formed on the Cr layer. The gate insulating layer 4 and the a--Si layer 5 are formed by plasma chemical vapor deposition, and as a consequence, pinholes can occur therein due to the presence of contaminants such as dust. As a result, device yield is degraded due to short circuits occurring between the gate electrode/wiring layer and other (e.g., drain or source) electrode/wiring layers, as a consequence of pinholes occurring in the insulating layers disposed therebetween.
Various techniques for preventing these short circuits due to pinholes have been proposed heretofore. One technique, which is disclosed in U.S. Pat. No. 5,060,036, which is assigned to the assignee of the present invention, is to form on the gate electrode the double insulating layers and a laminated double-layer amorphous silicon (a--Si) structure with a silicon nitride (SiN) layer disposed therebetween. Another technique, which is disclosed in Japanese Un-examined Patent Publication No. 2-85826, is to employ a fabrication process as depicted in FIGS. 2A and 2B, as will now be described. More particularly, in accordance with this fabrication process, a gate electrode/wiring layer 12 comprised of a metal alloy, of which Al is a major constituent element, is formed on a substrate 11, and then patterned. A layer of pure aluminum (Al) 12' is then deposited on the gate electrode 12, and then anodized. The resultant anodized layer 13 serves as gate insulating film interposed between the gate electrode structure and the source and/or drain electrode structure. This technique purportedly eliminates hillocks, and thus, short circuits between adjacent electrodes at their cross-over points.
FIGS. 3A and 3B depict a plan view and a sectional view, respectively, of a display panel fabricated in accordance with the process illustrated in FIGS. 2A and 2B. The reference numerals appearing in FIGS. 3A and 3B designate the following elements: a substrate 11; an Al (or Al--Si or Al--Pd) layer 12; an Al.sub.2 O.sub.3 layer 13; a silicon nitride (SiN) layer 14; an amorphous semiconductor layer 15; a silicon nitride (SiN) layer 16; and impurity-doped amorphous semiconductor layer 17; a Cr layer 18; an Al layer 19; a transparent electrode 20; a protective film 21; a gate wiring bus line 22; a gate wiring structure 23, 24; a signal line (drain electrode) 25; a thin film transistor A; and, an anodized region B of the signal lines 25.
In the conventional active matrix liquid crystal display panel depicted in FIGS. 3A and 3B, current is supplied through the gate electrode/wiring structure 12 when the Al layer 12' is anodized, in order to form an insulating layer 13 between the adjacent electrodes/wiring structures 12, as can be seen in FIGS. 2A-2D and 3A and 3B. However, unanodized Al strips 27 often remain between the adjacent electrodes/wiring structures 12, as shown in FIGS. 2C and 2D. Consequently, an Al.sub.2 O.sub.3 film with inferior transparency is obtained due to the opacity (i.e. zero light transmittance) of the residual unanodized aluminum strips 27. Moreover, te presence of these residual unanodized aluminum strips 27 disadvantageously affects the desired flattening of the electrodes/wiring structures, i.e., renders the upper surface of the composite resultant structure (12, 13) uneven/unlevel, which increases the complexity of subsequent manufacturing steps, resulting in, among other things, pinholes and unreliable step coverage. Ultimately, due to the above-mentioned problems, there is still an unacceptable likelihood that short circuits will occur between adjacent electrodes/wiring structures and thereby diminish device yield.
It is therefore an object of the present invention to eliminate the above-described problems, disadvantages, and shortcomings of the presently available display panels and processes for making the same.